The present invention relates to a memory cell structure for use in a random access memory (RAM), and more particularly, to such a cell that is radiation hard.
When the entire cell structure is subject to transient radiation and has bias voltages applied, electron-hole pairs are generated in all the component materials, and photocurrents flow between the circuit devices through the normally insulating layers and insulating substrates. In particular, it is recognized that the dominant failure mechanism of silicon-on-insulator (SOI) devices under transient radiation is photoconduction between silicon devices through the insulating substrate, e.g. sapphire. This effect can cause charge or discharge of certain critical nodes, such as gate electrodes of inverters, and cause a change in logic state of the memory cell.
Furthermore, the MOS capacitor structure used in a cell usually has one capacitor plate adjacent to the substrate and coupled directly to the gate electrodes of the inverter silicon devices. The photocurrent conduction in the substrate caused by the radiation pulse can easily cause a change in the cell's logic state since the gate is the sensitive MOS transistor electrode.
It is therefore desirable to provide a memory cell structure that resists a change in logic state even when the entire cell is subject to all types of radiation.